1. Field of the Invention
The present invention relates to through molding via (TMV) technology, and more particularly, to a conductive via structure and a fabrication method thereof.
2. Description of Related Art
Currently, through molding via (TMV) technology has been widely applied in semiconductor fields. The TMV technology mainly involves forming openings on a surface of an encapsulant through laser ablation so as to expose electrical contacts, such as circuits or conductive pads, beneath the encapsulant.
For example, the TMV technology can be used for fabricating fan-out type package on package (POP) structures. FIGS. 1A to 1D are schematic cross-sectional views showing a method for fabricating a conductive via structure for a fan-out type package on package structure according to the prior art.
Referring to FIG. 1A, a packaging substrate 10 having a plurality of circuit layers 100 is disposed on a support member 9. A chip 11 is disposed on the packaging substrate 10 and an encapsulant 12 is formed on the packaging substrate 10 to encapsulate the chip 11.
Referring to FIG. 1B, a dielectric layer 13 is formed on the encapsulant 12.
Referring to FIG. 1C, a plurality of openings 130 are formed by laser drilling to penetrate the dielectric layer 13 and the encapsulant 12, thereby exposing a portion of the uppermost circuit layer 100, i.e., conductive pads, from the openings 130.
Referring to FIG. 1D, a conductive material 14 such as copper is formed on the dielectric layer 13 and in the openings 130 by electroplating. As such, the conductive material 14 on the dielectric layer 13 forms a fan-out type redistribution layer 141 and the conductive material 14 in the openings 130 forms a plurality of conductive vias 140 that electrically connect the circuit layer 100 and the redistribution layer 141.
Subsequently, referring to FIG. 1E, an insulating layer 15 is formed on the redistribution layer 141 and the dielectric layer 13, and a plurality of openings 150 are formed in the insulating layer 15 for exposing conductive pads 142 of the redistribution layer 141. Thereafter, a surface processing layer 16 is formed on the conductive pads 142 for mounting a plurality of conductive elements, for example, solder balls (not shown). As such, a semiconductor package 1 is obtained. Finally, the support member 9 is removed.
Referring to FIG. 1C, the openings 130 have a maximum width R of 100 to 200 um. As semiconductor packages are developed toward the trend of high performance and small size, the width of the openings is becoming smaller and smaller and the density of the openings is becoming higher and higher.
However, as shown in FIG. 1C′, the openings 130 formed by laser drilling generally have uneven wall surfaces 130a. The wall surfaces 130a have a roughness Ra of 50 um. Therefore, the conductive vias 140 formed in the openings 130 have serrated surfaces, as shown in FIG. 1D. As such, electric charges easily concentrate on protruding portions of the surfaces of the conductive vias 140, thereby easily causing joule heating under high resistance and consequently causing an open circuit to occur.
Further, during the copper electroplating process, a thin copper seed layer (not shown) is first formed by sputtering. However, since copper is not compatible with the encapsulant 12, the copper seed layer easily peels off from the rough wall surfaces 130a of the openings 130, thus causing delamination of the conductive material 14 and reducing the reliability of the semiconductor package 1.
Accordingly, referring to FIG. 1C″, a passivation layer 12′ can be formed on the wall surfaces 130a of the openings 130 so as to form vias 120 that have reduced roughness. Thereafter, the conductive material 14 can be formed in the vias 120. However, since the passivation layer 12′ only has a thickness t of 1 to 2 um, it cannot effectively reduce the roughness of the wall surfaces 130a of the openings 130. That is, the wall surfaces 120a of the vias 120 are still rough. Therefore, such a method cannot overcome the above-described drawbacks of open circuit and delamination of the conductive material.
Therefore, there is a need to provide a conductive via structure and a fabrication method thereof so as to overcome the above-described drawbacks.